Aug. 31, 2026

SoC DFT Lead, Director

Qualcomm Ho Chi Minh City, Hồ Chí Minh

Verilog System Verilog

1mo

Staff. Physical Design Engineer

Qualcomm San Diego, California

ASIC RTL

1mo

Senior Product Test Engineer – Digital / ATE (SoC)

Qualcomm Singapore, Central Singapore

DFT Design for Test

1mo

Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

1mo

IC Digital Test Engineer

NVIDIA Yokneam, Israel

RTL STA

1mo

Senior Physical Design Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

1mo

Senior Physical Design Backend Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

1mo

Staff FPGA Verification Engineer

CesiumAstro Austin, Texas

FPGA UVM

1mo

Manager, Hardware Engineering

CesiumAstro Westminster, Colorado

FPGA Digital Design

1mo

Manager, Hardware Engineering

CesiumAstro Austin, Texas

FPGA Digital Design

1mo

FPGA Verification Engineer II

CesiumAstro El Segundo, California

VHDL Verilog

1mo

Engineering Manager, RF Hardware

CesiumAstro Austin, Texas

Synthesis DFT

1mo

Engineering Manager, RF Hardware

CesiumAstro Westminster, Colorado

Synthesis DFT

1mo

Aug. 30, 2026

NASA Space Reactor – 1 Freedom Flight Software Verification and Validation (V&V) Test Engineer

CACI Houston, Texas

Verification

1mo

RF Hardware Engineer

CACI Aberdeen Proving Ground, MD, US

VHDL Verilog

1mo

Mid to Senior Systems/Hardware Engineer (VHDL)

CACI Fort Meade, MD, US

VHDL Verilog

1mo

STA/Timing Methodology Engineer (Lead/Staff)

Qualcomm Bangalore, India

FPGA ASIC

1mo

Peripherals (Ethernet) Validation Engineer - Sr. Lead / Staff

Qualcomm Bangalore, India

Verilog System Verilog

1mo

RTL Design -Staff/Sr Staff

Qualcomm Bangalore, India

FPGA Logic Design

1mo

NPU/AI Processor Architecture (RTL)/Arithmetic Design Engineer - Sr Staff

Qualcomm Bangalore, India

1mo

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development

Qualcomm Santa Clara, California

Verilog SystemVerilog

1mo

CPU RTL Design Engineer

Qualcomm Hsinchu City, Taiwan

ASIC RTL

1mo

Firmware Development Engineer, Sr. Staff

Qualcomm Multiple locations

FPGA SOC

1mo

Design Implementation Synthesis Engineer, Staff / Sr Staff

Qualcomm Bangalore, India

STA Synthesis

1mo

Design Verification Architect (Sr staff or above)

Qualcomm Bangalore, India

SystemVerilog FPGA

1mo

GPU Design Verification Engineer - Qualcomm, Cambridge, United Kingdom

Qualcomm Cambridge, England

VHDL Verilog

1mo

SoC RTL Design- Sr Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1mo

Senior Engineer - DFT

Qualcomm Bangalore, India

FPGA ASIC

1mo

CPU Post-Silicon Validation Engineer - Multiple Levels

Qualcomm Multiple locations

FPGA SOC

1mo

STA Design Engineer - Static Timing Analysis - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

1mo

CPU Physical Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC Logic Design

1mo

Wireless R&D IP Verification Engineer, Senior Staff

Qualcomm Bangalore, India

SystemVerilog FPGA

1mo

Staff CAD Engineer (Silicon) - Cork, Ireland

Qualcomm Cork, Munster

Verilog System Verilog

1mo

3D Memory Chip Architect and Design, Principal Engineer

Qualcomm San Diego, California

Verilog ASIC

1mo

CPU Design Verification Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC SOC

1mo

Sr. Staff CPU Physical Design CAD Engineer

Qualcomm Multiple locations

Logic Design Digital Design

1mo

Analog/Mixed Signal ASIC Design Engineer

Qualcomm San Diego, California

VHDL Verilog

1mo

Staff Memory Controller Architecture and Design Engineer

Qualcomm San Diego, California

ASIC RTL

1mo

SoC Program Manager

Qualcomm Chennai, Tamil Nadu

ASIC Synthesis

1mo

FPGA prototyping/FPGA design Engineer (Lead/Staff)

Qualcomm Bangalore, India

FPGA Verification

1mo

Microprocessor Silicon Validation and Optimization Engineer-Staff

Qualcomm Austin, Texas

ASIC SOC

1mo

Turing-IP Design Verification - Sr Engineer

Qualcomm Bangalore, India

FPGA Verification

1mo

Senior Design Engineer - Sensors - Cork, Ireland

Qualcomm Cork, Munster

Verilog System Verilog

1mo

Video Codec Design Engineer, up to Staff

Qualcomm Taipei, Taipei

Verilog SystemVerilog

1mo

CPU Design Verification Engineer, Staff/ Sr Staff (RISC V) - Cork, Ireland

Qualcomm Cork, Munster

Verilog ASIC

1mo

CPU Microarchitect/RTL design Engineer, Senior/Staff - Cork, Ireland

Qualcomm Cork, Munster

VHDL Verilog

1mo

CPU SRAM Design Engineer

Qualcomm Austin, Texas

Verilog Static Timing

1mo

Staff Sensor Subsystem Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

VHDL Verilog

1mo

Staff engineer- GPU Power Engineer

Qualcomm Noida, Uttar Pradesh

FPGA RTL

1mo

STA/Timing and Physical Design Engineer (Senior/Lead) - Modem Team

Qualcomm Bangalore, India

FPGA RTL

1mo