Sept. 1, 2026

Hardware Design Engineer - 2027 Grads

Hudson River Trading New York, NY, United States

SystemVerilog FPGA

1mo

Design Verification (DV) Engineer - 2027 Grads

Hudson River Trading New York, NY, United States

FPGA ASIC

1mo

Sr. Engineer - Analog Validation

Ambiq Micro, Inc. Austin, Texas

Digital Design SOC

1mo

Aug. 31, 2026

Power Infrastructure Engineer

SiFive Multiple locations

FPGA ASIC

1mo

Design Verification Infrastructure Engineer - Platform

SiFive Multiple locations

Chisel Verification

1mo

ASIC Design Engineer (Hardware Security)

Qualcomm Multiple locations

Verilog System Verilog

1mo

Camera Design Engineer

Qualcomm Vancouver, British Columbia

VHDL Verilog

1mo

DFT Engineer - Multiple Levels

Qualcomm Hyderabad, Telangana

FPGA ASIC

1mo

DRAM Circuit Designer, up to Staff

Qualcomm Hsinchu City, Taiwan

Verilog ASIC

1mo

RTL Design (NOC/Interconnect) -Staff

Qualcomm Hyderabad, Telangana

Verilog RTL

1mo

Silicon Test Engineer (Digital)

Qualcomm Tijuana, Baja California

Digital Design DFT

1mo

Mask Layout Designer

Qualcomm Markham, Ontario

Digital Design SOC

1mo

CPU Server Physical Design Methodology, Infrastructure and Automation Engineer

Qualcomm Santa Clara, California

STA Place and Route

1mo

CPU Server Floorplan and Integration Engineer

Qualcomm Santa Clara, California

RTL STA

1mo

Design Implementation - Synthesis, Sr Staff Engineer

Qualcomm Bangalore, India

FPGA RTL

1mo

Director - Design Manager

Qualcomm Bangalore, India

FPGA Logic Design

1mo

Validation Engineer

Qualcomm Tijuana, Baja California

VHDL Verilog

1mo

Sr Staff DFT Engineer - NPU/AI Processor

Qualcomm Bangalore - Remote, India

FPGA ASIC

1mo

ASIC Timing and Methodology Engineer

Qualcomm Tijuana, Baja California

ASIC RTL

1mo

RTL Design Engineer, Sr Staff

Qualcomm Toronto, Ontario

VHDL Verilog

1mo

Emulation Engineer / Emulation Platform Engineer

Qualcomm Austin, Texas

SystemVerilog FPGA

1mo

DDRSS Validation Engineer (RTL + Silicon Debug)

Qualcomm San Diego, California

Verilog SystemVerilog

1mo

RTL Design - SrLead/Sr Staff

Qualcomm Bangalore, India

FPGA Logic Design

1mo

Design Implementation - Synthesis Engineer, Lead

Qualcomm Bangalore, India

FPGA RTL

1mo

FY27 Intern - CPU Engineering Internship 2027 - 6 months, Cork

Qualcomm Cork, Munster

Verilog System Verilog

1mo

RISCV CPU Systems Architecture/RTL Engineer – Senior Level

Qualcomm Santa Clara, California

VHDL Verilog

1mo

Test Engineer, Senior - Hod Hasharon

Qualcomm Hod HaSharon, Central District

ASIC DFT

1mo

Architecture Engineer, Senior Staff - Hod HaSharon

Qualcomm Hod HaSharon, Central District

ASIC SOC

1mo

SoC Modeling Engineer

Qualcomm San Diego, California

ASIC RTL

1mo

SOC Verification and Methodology Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

1mo

NoC Interconnect Design Engineer and Architect

Qualcomm San Diego, California

FPGA ASIC

1mo

RAS and Manageability Controller Firmware Developer

Qualcomm Bangalore, India

FPGA SOC

1mo

Software Engineer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

VHDL Verilog

1mo

Data Converters Mixed Signal Lead, Sr. Staff

Qualcomm Bangalore, India

Verilog FPGA

1mo

Server SoC Security Architect

Qualcomm Multiple locations

SOC

1mo

Sr Lead Engineer - DFT

Qualcomm Bangalore, India

FPGA Verification

1mo

Principal CPU Physical Design Engineer (San Diego, CA)

Qualcomm San Diego, California

ASIC RTL

1mo

Server SoC System Architect

Qualcomm Multiple locations

SOC

1mo

Physical Design Engineer (Senior/Lead) – Modem Team

Qualcomm Bangalore, India

FPGA RTL

1mo

NOC Emulation Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1mo

Clocking Systems Engineer, Staff

Qualcomm Toronto, Ontario

SystemVerilog RTL

1mo

CPU RTL Design Engineer (Senior/Staff) - Cambridge, UK

Qualcomm Cambridge, England

VHDL Verilog

1mo

Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm Markham, Ontario

SystemVerilog ASIC

1mo

Physical Design Engineer - DSP Team

Qualcomm Austin, Texas

ASIC Synthesis

1mo

FPGA Firmware Engineer / FPGA Design Engineer

Qualcomm San Diego, California

Verilog System Verilog

1mo

Physical Design Engineer, Staff

Qualcomm Toronto, Ontario

ASIC Static Timing

1mo

Sr. Staff/Principal Engineer - Low Power Chip Architect / System Engineer

Qualcomm San Diego, California

Verilog ASIC

1mo

DC Char ATE Test Engineer, up to Sr.

Qualcomm Hsinchu City, Taiwan

DFT SOC

1mo

Embedded NPU Software Engineer

Qualcomm San Diego, California

Logic Design Digital Design

1mo

Senior Design Verification Engineer- Haifa, Hod Hasharon, Ramat Gan

Qualcomm Multiple locations

SystemVerilog ASIC

1mo