Sept. 17, 2026

SoC Design Implementation Engineer (Up to Principal Level)

Qualcomm Ho Chi Minh City, Hồ Chí Minh

Verilog SystemVerilog

15d

System Hardware Validation Engineer (All Levels) - Cork, Ireland

Qualcomm Cork, Munster

ASIC SOC

15d

PostSi Debug Validation Engineer

Qualcomm Bangalore, India

FPGA RTL

15d

Sr. Staff Hardware Engineer, System Level Test (Technical Lead)

Qualcomm San Diego, California

Digital Design SOC

15d

NPU AI/Processor Synthesis Engineer- Sr Staff

Qualcomm Bangalore, India

FPGA ASIC

15d

Product Engineering

Qualcomm Tijuana, Baja California

Digital Design DFT

15d

Physical Design Engineer - Mixed Signal IP

Qualcomm San Diego, California

VHDL Verilog

15d

Synthesis Engineer

Qualcomm Bangalore, India

FPGA Verification

15d

SOC Design Verification Engineer – Data Center Solutions

Qualcomm San Diego, California

Verilog System Verilog

15d

SOC Design Verification Engineer-Staff

Qualcomm San Diego, California

ASIC RTL

15d

NPU AI/Processor Synthesis Engineer- Sr Staff

Qualcomm Bangalore, India

FPGA ASIC

15d

Senior ASIC Design Engineer, Low Power AI

Qualcomm Markham, Ontario

VHDL Verilog

15d

Sr. Staff Engineer, System Level Test

Qualcomm San Diego, California

Digital Design SOC

15d

SOC Design Engineer

Qualcomm Multiple locations

VHDL Verilog

15d

Audio/Edge AI Silicon Validation and Firmware Engineer

Qualcomm Markham, Ontario

FPGA ASIC

15d

Wireless R&D IP Verification Sr Engineer

Qualcomm Bangalore, India

SystemVerilog FPGA

15d

Senior Hardware Security Architect

NVIDIA Multiple locations

ASIC RTL

15d

Senior System Software Engineer - Halos Core and Robotics Platform

NVIDIA Bengaluru, Karnataka

ASIC SOC

15d

Architecture Energy Modeling Engineering Intern - 2027

NVIDIA Shanghai, Shanghai

Verilog ASIC

15d

Power Analysis and Optimization Intern - 2027

NVIDIA Shanghai, Shanghai

ASIC RTL

15d

Custom SOC Intern - 2027

NVIDIA Shanghai, Shanghai

Verilog System Verilog

15d

Physical Design and Timing Engineer Intern - Summer 2027

NVIDIA Santa Clara, California

RTL STA

15d

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

15d

Principal DFT Engineer

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

15d

Lead Production Test Development Engineer, Customer Hardware (Starlink)

SpaceX Bastrop, Texas

DFT Design for Test

15d

Cybersecurity Engineer - Security Operations Center (SOC)

Jane Street Hong Kong, China

15d

RF Designer

Fidus Systems Virginia, United States

Remote FPGA ASIC

15d

Midcore Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

15d

Sept. 16, 2026

Senior Digital Design Engineer

Analog Devices Multiple locations

Verilog SystemVerilog

16d

Principal Project Manager

Analog Devices Limerick, Ireland

ASIC HDL

16d

Senior Engineer, Analog Design Engineering

Analog Devices Milan, Lombardy

Verilog SystemVerilog

16d

Staff Software Verification Engineer, Datacenter & Energy Software

Analog Devices Valencia, Valencia

Verification

16d

Senior Engineer, Design Verification Engineering

Analog Devices Shanghai, Shanghai

SystemVerilog UVM

16d

Senior Engineer, Digital Design Engineering

Analog Devices Shanghai, Shanghai

Digital Design Verification

16d

Engineer, Digital Design Engineering

Analog Devices Valencia, Valencia

Verilog SystemVerilog

16d

Senior FPGA Design Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

16d

Internship: Digital Design F/M

NXP Semiconductors Catania, Sicily

Verilog SystemVerilog

16d

Senior IC Design Verification Engineer

NXP Semiconductors Kanata

Verilog System Verilog

16d

Timing & Power Analysis CAD Engineer

Marvell Bangalore, India

ASIC RTL

16d

Staff Formal Verification Engineer

SiFive Multiple locations

VHDL Verilog

16d

Front End Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

16d

Senior Post-Silicon Validation Engineer

K2 Space Seattle, Washington

FPGA ASIC

16d

Senior Post-Silicon Validation Engineer

K2 Space Los Angeles, California

FPGA ASIC

16d

Senior ASIC Package Design Engineer

K2 Space Seattle, Washington

ASIC SOC

16d

Senior ASIC Package Design Engineer

K2 Space United States - Remote

ASIC SOC

16d

Principal ASIC Package Design Engineer

K2 Space Seattle, Washington

ASIC SOC

16d

Principal ASIC Package Design Engineer

K2 Space United States - Remote

ASIC SOC

16d

Summer 2027 - Electrical Engineering Internship, FPGA

CesiumAstro Westminster, Colorado

VHDL Verilog

16d

DSP Designer

Fidus Systems Huntsville, Alabama

Remote FPGA ASIC

16d

Electrical Test Engineer, Intelligence Systems

Anduril Santa Ana, California

FPGA RTL

16d