Sept. 18, 2026

Design Verification

Apple Cupertino, California

Verilog SystemVerilog

14d

Design Verification Engineer

Apple Cupertino, California

Verilog SystemVerilog

14d

Senior Manager – Characterization

Microchip Technology Hyderabad, Telangana

VHDL Verilog

14d

RTL (NOC)Design -Sr Lead/Staff

Qualcomm Noida, Uttar Pradesh

ASIC RTL

14d

SoC Design & Synthesis Engineer

Qualcomm Tijuana, Baja California

ASIC RTL

14d

RTL(NOC)Design-Sr Lead/Staff

Qualcomm Bangalore, India

FPGA Verification

14d

Staff SoC Architect, AI Data Center

Qualcomm San Diego, California

SOC

14d

NPU Physical Design Engineer Sr Staff

Qualcomm Bangalore, India

FPGA STA

14d

Program Manager

Qualcomm Taipei, Taipei

ASIC Digital Design

14d

Distinguished Technologist, VLSI Engineering

HPE Juniper Networks Sunnyvale, California

FPGA Logic Design

14d

Design For Test Intern, MS - Summer 2027

Marvell Santa Clara, California

Verilog System Verilog

14d

Senior Staff Digital Design Engineer

Marvell Multiple locations

SystemVerilog FPGA

14d

Sr MSIAM SOC Engineer (Unit 42)

Palo Alto Networks Tel Aviv, Tel Aviv District

SOC

14d

Senior FPGA Engineer

AeroVironment Sunrise, Florida

VHDL FPGA

14d

FPGA Engineer

AeroVironment Albuquerque, New Mexico

VHDL Verilog

14d

FPGA Engineer

AeroVironment Albuquerque, New Mexico

VHDL Verilog

14d

Senior principal DFT engineer

NXP Semiconductors Bangalore, India

Digital Design Verification

14d

Staff Systems Signal Processing Engineer

Northrop Grumman Baltimore, Maryland

VHDL Verilog

14d

FPGA Digital Design Engineer Level 4 (AHT)

Northrop Grumman Northridge, California

VHDL Verilog

14d

RF Applications Engineer

Analog Devices Limerick, Ireland

FPGA SOC

14d

Senior Staff AI Accelerator Performance Architect

Cerebras Systems Sunnyvale, California

FPGA RTL

14d

Lead Electrical Test Engineer, Customer Hardware (Starlink)

SpaceX Bastrop, Texas

DFT Design for Test

14d

Sept. 17, 2026

Staff Engineer Formal(IOMMU-N)

SiFive Bengaluru, Karnataka

FPGA ASIC

15d

Senior Engineer II - Physical Design

Microchip Technology Burnaby, British Columbia

VHDL Verilog

15d

Senior Lead Verification Engineer, Digital IP

NXP Semiconductors Bangalore, India

Verilog System Verilog

15d

Stage ingénieur : Analyse de la consommation et optimisation des tests pour les System-on-Chip (SoC) de nouvelle génération (H/F)

NXP Semiconductors Sophia-Antipolis (Valbonne)

Digital Design DFT

15d

Stage Ingénieur : Vérification de Performance et Modélisation de Systèmes sur Puce (SoC) (H/F)

NXP Semiconductors Grenoble, Auvergne-Rhône-Alpes

SOC Verification

15d

Stage Ingénieur : Application de l'Intelligence Artificielle à l'intégration de blocs RTL (ASIC/FPGA) (H/F)

NXP Semiconductors Sophia-Antipolis (Valbonne)

VHDL Verilog

15d

Stage Ingénieur : Développement d’un outil d’analyse de performance pour simulations hardware (H/F)

NXP Semiconductors Caen, Normandie

VHDL Verilog

15d

Stage ingénieur: Amélioration de la vérification d’un contrôleur I2C avec UVM, preuve formelle et IA (H/F)

NXP Semiconductors Caen, Normandie

Verilog SystemVerilog

15d

Stage Ingénieur : Évaluation des Outils de Vérification des Transitions de Domaines d'Horloge (CDC) assistés par IA (H/F)

NXP Semiconductors Grenoble, Auvergne-Rhône-Alpes

RTL Synthesis

15d

DFT Engineer

NXP Semiconductors Tianjin, Tianjin

VHDL Verilog

15d

Senior Methodologist for AIML Enhanced Design/Verification

HPE Juniper Networks Sunnyvale, California

SystemVerilog FPGA

15d

Principal VLSI Engineer

HPE Juniper Networks Sunnyvale, California

FPGA Logic Design

15d

Sr. Design Verification Engineer - Digital

Semtech San Diego, California

Verilog SystemVerilog

15d

Avionics Integration and Test Engineer III

Blue Origin Huntsville, Alabama

VHDL Verilog

15d

Die-to-Die (D2D) Applications Engineer

Broadcom Fort Collins, Colorado

Verilog ASIC

15d

GPU Design Verification Engineer

Intel Bangalore, India

Verilog System Verilog

15d

Senior Engineer, Analog Design Engineering

Analog Devices Taipei, Taipei

Verilog RTL

15d

Senior Engineer, FPGA Design

Analog Devices Cluj-Napoca, Cluj County

VHDL Verilog

15d

Senior Digital Design CAD Engineer

Qualcomm San Diego, California

ASIC SOC

15d

Senior Hardware Test Engineer

Qualcomm San Diego, California

DFT Design for Test

15d

Synthesis Engineer, Principal

Qualcomm Bangalore, India

STA Synthesis

15d

FY27 Intern - Low-Power AI, Audio, and Sensors Subsystem Engineering Internship - ASIC Design / Verification/Implementation - Canada (12 or 16 months)

Qualcomm Markham, Ontario

Verilog System Verilog

15d

FY27 Intern - Low-Power AI, Audio, and Sensors Subsystem Engineering Internship - ASIC Firmware / Embedded - Canada (12 or 16 months)

Qualcomm Markham, Ontario

FPGA ASIC

15d

Senior SOC Physical Design Engineer

Qualcomm San Diego, California

ASIC Place and Route

15d

Staff SOC Physical Design Engineer

Qualcomm Austin, Texas

ASIC Place and Route

15d

Senior CPU Performance Verification Engineer

Qualcomm San Diego, California

RTL

15d

Senior Mixed-Signal Physical Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC STA

15d

Physical Design Engineer, Senior/Staff - Cork, Ireland

Qualcomm Cork, Munster

ASIC STA

15d