Sept. 19, 2026

Staff Engineer – DFT Engineering

Analog Devices Multiple locations

ASIC RTL

13d

Senior Manager, Layout

Analog Devices Limerick, Ireland

RTL DFT

13d

SoC Design Manager / Product Lead

Analog Devices Vancouver, British Columbia

ASIC RTL

13d

Principal Digital Design Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

13d

Senior Chip Design Engineer

NVIDIA Beer Sheva, Israel

VHDL Verilog

13d

Principal Digital Engineer or Sr. Principal Digital Engineer

Northrop Grumman Multiple locations

VHDL FPGA

13d

FPGA Design Senior Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

13d

FY27 Intern - Analog Design Internship - Canada (12 or 16 months)

Qualcomm Toronto, Ontario

Verilog SystemVerilog

13d

Senior Lead Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

13d

Senior Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

13d

Senior DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

High Performance DSP core Implementation(Synthesis) Senior Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

13d

High Performance DSP core Implementation(Synthesis) Senior Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

13d

Senior DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

DFT Staff Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

Senior Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

High Performance DSP core Implementation(Synthesis) Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

13d

Staff Engineer- Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

High Performance DSP core Implementation(Synthesis) Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

13d

High Performance DSP core Implementation(Synthesis) Senior Lead Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

13d

Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

13d

Functional Verification Engineer, Senior - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

VHDL Verilog

13d

Design Implementation Engineer, Sr Lead

Qualcomm Bangalore, India

FPGA Synthesis

13d

SOC RTL Design Engineer - Staff

Qualcomm Hyderabad, Telangana

FPGA ASIC

13d

SoC Physical Design Engineer (Senior/Lead)

Qualcomm Bangalore, India

FPGA ASIC

13d

System Level Test Engineer, Senior (ATE Experience)

Qualcomm Singapore, Central Singapore

Digital Design DFT

13d

SOC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

13d

FY27 Intern - MSIP Digital Design Verification Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

VHDL Verilog

13d

FY27 Intern - MSIP Digital Design Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

Verilog System Verilog

13d

Staff Mixed-Signal Digital Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

13d

RF/Analog Design/Mixed-Signal Engineering Internship – Summer 2027

Qualcomm Multiple locations

Verilog SystemVerilog

13d

Hardware (CPU, GPU, SoC, Digital Design, DV) Engineering Internship – Summer 2027

Qualcomm Multiple Locations

Verilog SystemVerilog

13d

Principal Engineer, Analog Design (Team Lead)

Ambiq Micro, Inc. Singapore, Central Singapore

RTL Digital Design

13d

Senior Embedded Software Designer

Kepler Communications Toronto, California

VHDL Verilog

13d

Senior Electrical Engineer

Astranis San Francisco, California

FPGA RTL

13d

Senior Avionics Engineer

Astranis San Francisco, California

FPGA RTL

13d

Senior Manager, Advanced Hardware Compute

Anduril Costa Mesa, California

VHDL Verilog

13d

Principal Digital Hardware Engineer (FPGA/VHDL)

Anduril Costa Mesa, California

VHDL Verilog

13d

Digital Hardware Engineering Lead

Anduril Costa Mesa, California

VHDL Verilog

13d

Verification Engineer | Core Engineering

Jump Trading Bristol

SystemVerilog ASIC

13d

Verification Designer

Fidus Systems Austin, Texas

Remote SystemVerilog FPGA

13d

Sept. 18, 2026

Senior System Software Engineer, SOC

NVIDIA Multiple locations

SOC

14d

Senior SoC Physical Layout & Full-Chip Integration Engineer

Intel Multiple locations

Verification

14d

Senior CPU Logic Design Engineer

Intel Haifa, Haifa District

SystemVerilog RTL

14d

CPU Pre-Silicon Verification Lead

Intel Bangalore, India

Verilog System Verilog

14d

Senior CPU RTL Design Engineer

Intel Multiple locations

Verilog System Verilog

14d

Design Eng 3

Lattice Semiconductor Manila, Metro Manila

Verilog System Verilog

14d

FE Engineering

Apple Cupertino, California

Verilog SystemVerilog

14d

Design Verification Engineer

Apple Cupertino, California

Verilog System Verilog

14d

FE Engineer

Apple Cupertino, California

Verilog System Verilog

14d