UVM Jobs

Staff Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

2mo

Staff Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

2mo

Senior Staff Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

2mo

Senior Staff Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

2mo

Senior Formal Verification Engineer (CH-64001149)

Cirrus Logic Austin, Texas

Verilog System Verilog

2mo

Senior Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

2mo

Senior Design Verification Engineer (BO - 01)

Cirrus Logic Chandler, Arizona

VHDL Verilog

2mo

Senior Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

2mo

Mixed Signal Modelling and Verification Engineer (#GNEG4)

Cirrus Logic Edinburgh, Scotland

Verilog SystemVerilog

2mo

Digital Design Engineer (TR-NWB)

Cirrus Logic Newbury, England

Verilog SystemVerilog

2mo

Digital Design Engineer (AP)

Cirrus Logic Edinburgh, Scotland

Verilog SystemVerilog

2mo

Digital Design Engineer

Cirrus Logic Austin, Texas

Verilog ASIC

2mo

Design Verification Manager

Cirrus Logic Newbury, England

SystemVerilog RTL

2mo

Design Verification Engineer (NWB)

Cirrus Logic Newbury, England

SystemVerilog RTL

2mo

Design Verification Engineer (EDI)

Cirrus Logic Edinburgh, Scotland

SystemVerilog RTL

2mo

Design Verification Engineer

Cirrus Logic Austin, Texas

VHDL Verilog

2mo

Analog Mixed Signal Modeling Engineer (UL - 02)

Cirrus Logic Austin, Texas

Verilog SystemVerilog

2mo

Staff Engineer - CPU Verification

SiFive Hyderabad, Telangana

Verilog SystemVerilog

2mo

Manager / Senior Manager – Design Verification

Silicon Labs Hyderabad, Telangana

SystemVerilog FPGA

2mo

Staff/Senior Staff Engineer - AMS Verification

Silicon Labs Hyderabad, Telangana

Verilog System Verilog

2mo