105 open FPGA & RTL jobs at SiFive

105 open logic design roles at SiFive.

ASIC jobs FPGA jobs RTL jobs SOC jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs VHDL jobs California Gujarat Hsinchu Karnataka Massachusetts Shanghai Telangana Texas

Staff RTL Design Engineer - Cache Subsystem

SiFive Hsinchu, Hsinchu

VHDL Verilog

22h

Staff Engineer - CPU DV

SiFive Hyderabad, Telangana

Verilog System Verilog

Senior Customer Support Engineer, Physical Design

SiFive Bengaluru, Karnataka

RTL Place and Route

Principal Field Application Engineer

SiFive Shanghai, Shanghai

FPGA RTL

13d

Senior Engineer - Design Verification

SiFive Ahmedabad, Gujarat

SystemVerilog FPGA

22d

Senior CPU Formal Verification Engineer

SiFive Multiple locations

VHDL Verilog

26d

Senior CPU Design Verification Engineer

SiFive Hyderabad, Telangana

Verilog SystemVerilog

26d

Distinguished Formal Verification Architect

SiFive Multiple locations

SOC Verification

28d

Senior Engineer - CPU Verification (ALU, FPU Formal and Datapath Verification)

SiFive Bengaluru, Karnataka

SystemVerilog ASIC

28d

Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)

SiFive Bengaluru, Karnataka

SystemVerilog ASIC

1mo

Staff Engineer Formal(IOMMU-N)

SiFive Bengaluru, Karnataka

FPGA ASIC

1mo

Principal Field Application Engineer

SiFive Shanghai, Shanghai

FPGA RTL

1mo

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