STA Jobs in California

Platform Integration Engineer

Intel Santa Clara, California

SystemVerilog RTL

1d

Senior ASIC Design Engineer - DSP/Analog/SerDes

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

1d

Senior ASIC Design Engineer - DSP/Analog/SerDes

Celero Communications, Inc. San Jose, California

Verilog SystemVerilog

1d

Sr FPGA Design Engineer (NetSec)

Palo Alto Networks Headquarters, California

Verilog SystemVerilog

2d

Principal Design Engineer

Micron San Jose, California

RTL STA

2d

IC Design Engineer

Broadcom Multiple locations

RTL STA

2d

IC Design Engineer

Broadcom Multiple locations

RTL STA

2d

IC Design Engineer

Broadcom Multiple locations

RTL STA

2d

GPU Physical Design Engineer

Intel San Jose, California

ASIC Static Timing

2d

Senior Circuit Design Engineer

NVIDIA Santa Clara, California

RTL STA

3d

Design Implementation Engineer

Broadcom Multiple locations

ASIC STA

3d

Physical Design Engineer

Qualcomm San Diego, California

ASIC RTL

3d

Physical Design Engineer

Qualcomm Santa Clara, California

ASIC RTL

8d

Principal Compute Pathfinding ASIC Design

Micron Multiple locations

Verilog SystemVerilog

8d

Principal CPU PPA Pathfinding Engineer

Qualcomm San Diego, California

ASIC RTL

9d

Senior GPU Physical Design Engineer

Intel Multiple locations

ASIC RTL

9d

Senior Circuit Timing Engineer

NVIDIA Santa Clara, California

RTL STA

11d

Senior DTCO Engineer, CPU Physical Design

NVIDIA Multiple locations

Static Timing Place and Route

11d

Senior EDA Tools Hardware Engineer

Intel Multiple locations

Digital Design STA

13d

Senior Circuit Design Engineer

NVIDIA Santa Clara, California

RTL STA

14d