Sept. 25, 2026

Senior FPGA Engineer

CesiumAstro Austin, Texas

VHDL Verilog

7d

FPGA Engineer II

CesiumAstro Westminster, Colorado

VHDL Verilog

7d

FPGA Engineer II

CesiumAstro El Segundo, California

VHDL Verilog

7d

FPGA Engineer II

CesiumAstro Austin, Texas

VHDL Verilog

7d

FPGA Engineer I

CesiumAstro Melbourne, Florida

VHDL Verilog

7d

Senior DSP SW Engineer

E-Space Santa Clara, California

ASIC Synthesis

7d

Principal DSP SW Engineer

E-Space Santa Clara, California

ASIC RTL

7d

DSP SW Engineer

E-Space Santa Clara, California

FPGA ASIC

7d

Senior ASIC RTL Design Engineer, AI Hardware

Cerebras Systems Sunnyvale, California

Remote FPGA ASIC

7d

Senior FPGA Verification Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

7d

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

7d

Senior FPGA Verification Engineer

Anduril Boulder, Colorado

VHDL Verilog

7d

Senior Firmware Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

7d

Senior Embedded Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

7d

Staff Electrical Engineer (R5988)

Shield AI Seattle, Washington

FPGA Logic Design

7d

Sept. 24, 2026

VLSI Engineer Intern

HPE Juniper Networks Spring, Texas

VHDL Verilog

7d

XR Systems Technology Architect

Qualcomm Bangalore, India

RTL SOC

7d

Processor Design Verification Engineer

Qualcomm San Diego, California

Logic Design Digital Design

7d

SoC Program Management Director

Qualcomm Bangalore, India

DFT SOC

7d

Engineer, SoC Performance

Qualcomm Bangalore, India

7d

PMIC Systems and Validation Engineer, Staff

Qualcomm Bangalore, India

ASIC Digital Design

7d

PMIC Systems Validation Engineer

Qualcomm Bangalore, India

FPGA ASIC

7d

Hardware Security Program Manager

Qualcomm San Diego, California

RTL SOC

7d

EDT - FY27 Intern - Engineering Internship 2027 - 6 months, Cork

Qualcomm Cork, Munster

VHDL Verilog

7d

Silicon Test Engineer

Qualcomm Tijuana, Baja California

Digital Design DFT

7d

NPU / AI Processor Architecture Design-Staff

Qualcomm Bangalore, India

VHDL Verilog

7d

Qubit Control Physical Design Engineer

Intel Hillsboro, Oregon

RTL Static Timing

7d

Quantum IC Package Substrate Design Engineer

Intel Hillsboro, Oregon

ASIC SOC

7d

Firmware Development Undergraduate Engineering Co-op

Intel Virtual Canada

FPGA ASIC

7d

Pre-si Power and Performance System Validation Engineer

Intel Multiple locations

FPGA RTL

7d

FPGA Design Engineer

Ouster San Francisco, California

Verilog SystemVerilog

7d

ASIC Chip Lead

Broadcom Multiple locations

Verilog FPGA

7d

Senior Firmware Verification Engineer

NVIDIA Santa Clara, California

Verification

7d

Software Engineering Intern, Compiler Verification - Spring 2027

NVIDIA Multiple locations

7d

Architect - System Performance Verification and Analysis

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

7d

Security Architect - New College Grad 2026

NVIDIA Santa Clara, California

Verilog System Verilog

7d

Senior ASIC Verification Engineer - GPU

NVIDIA Santa Clara, California

Verilog System Verilog

7d

Digital IC Design Intern

Marvell IL - Petah Tikva

RTL Logic Design

7d

Security Verification/Validation Engineer Intern, BS - Summer 2027

Marvell Chandler, Arizona

Verilog System Verilog

7d

Principal Digital Engineer

Northrop Grumman Linthicum, Maryland

VHDL Verilog

7d

Staff Digital Engineer

Northrop Grumman Linthicum, Maryland

FPGA ASIC

7d

Technical Staff Engineer - Verification

Microchip Technology Hyderabad, Telangana

VHDL Verilog

7d

Senior Engineer II - Verification Engineer

Microchip Technology Multiple locations

Verilog SystemVerilog

7d

Senior Engineer II - Design

Microchip Technology Hauppauge, New York

Verilog System Verilog

7d

AI Verification Engineering Intern

NXP Semiconductors Tianjin, Tianjin

SOC Verification

7d

Stage Ingénieur : Génération semi-automatique de modèles, stimuli et testbenches par agents IA (F/H)

NXP Semiconductors Toulouse, Occitanie

VHDL Verilog

7d

Stage Ingénieur : Génération de VIP et d’assertions pour IP mixtes par agents IA (F/H)

NXP Semiconductors Toulouse, Occitanie

SystemVerilog RTL

7d

Junior DfT Design Engineer - MCU

NXP Semiconductors Catania, Sicily

VHDL Verilog

7d

Hardware Design Engineer

AeroVironment Annapolis Junction, Maryland

VHDL Verilog

7d

Principal Comms System and Modem Engineer- Terawave

Blue Origin Multiple locations

FPGA ASIC

7d