FPGAjobs - Jobs for FPGA, ASIC and RTL engineers

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Featured FPGA Engineer - Come Build Really Cool Shit with Us

MicroNova Waterford, Michigan

VHDL Verilog

29d

WiFi MAC Design - Lead Engineer

Qualcomm Chennai, Tamil Nadu

RTL Synthesis

NPU Physical Design Engineer (Lead/Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA STA

Electrical Engineering Intern – Summer 2027

CACI Florham Park, NJ, US

VHDL Verilog

Senior Firmware Engineer - UEFI

Lattice Semiconductor Duluth, Georgia

FPGA SOC

CPU Front-end Design Manager

Intel Bangalore, India

SystemVerilog RTL

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

Senior Core Design Verification Engineer

Intel Penang, Malaysia

Verilog System Verilog

Senior Core Design Verification Engineer

Intel Penang, Malaysia

Verilog System Verilog

Quantum Qubit Design Engineer

Intel Multiple locations

ASIC Digital Design

AI Develop Intern

NXP Semiconductors Shanghai, Shanghai

Verilog ASIC

Stage Ingénieur : Techniques de vérification basse consommation utilisant l'UVM, les preuves formelles et les capacités de l'IA (H/F)

NXP Semiconductors Sophia-Antipolis (Valbonne)

Verilog SystemVerilog

Digital IP Design Engineer (f/m/d)

NXP Semiconductors Munich, Bavaria

Verilog SystemVerilog

Stage Ingénieur : Conception pour le test (DFT) / Conception numérique (F/H)

NXP Semiconductors Sophia-Antipolis (Valbonne)

Verilog RTL

Stage Ingénieur : Conception Numérique SoC - Design for Test (F/H)

NXP Semiconductors Caen, Normandie

VHDL Verilog

Safety Engineer (f/m/d)

NXP Semiconductors Munich, Bavaria

DFT SOC

DFT Verification intern

NXP Semiconductors Tianjin, Tianjin

ASIC Digital Design

Senior System Firmware Engineer - SOC and GPU

NVIDIA Multiple locations

SOC

Senior ASIC Design Verification Engineer - LPU

NVIDIA Multiple locations

SystemVerilog ASIC

Senior Product Systems Engineer

Silicon Labs Budapest, Budapest

SOC IP Design

Staff Engineer Electronics

Northrop Grumman Chandler, Arizona

VHDL FPGA

Principal Systems Engineer — Lunar Human Landing System (HLS)

Blue Origin Multiple locations

HLS Verification

Sr Embedded Software Verification & Test Engineer — Lunar Permanance

Blue Origin Greater Seattle Area

VHDL Verilog

RF Systems FPGA Engineer II - Lunar Permanance

Blue Origin Denver, Colorado

VHDL Verilog

Embedded Software Engineer II - Lunar Permanence

Blue Origin Greater Seattle Area

VHDL Verilog

Senior Staff Engineer, Multi-die 3DIC

Marvell Santa Clara, California

ASIC RTL

Principal Engineer, Engineering Program Management

Marvell Hsinchu City

ASIC Design for Test

Software Engineer, AI Tooling

MatX Mountain View, California

SystemVerilog RTL

Physical Design Engineer, Timing

Tenstorrent Multiple locations

STA Static Timing

Staff FPGA Engineer - Simulink (REMOTE)

Anduril Costa Mesa, California

VHDL Verilog

Senior FPGA Engineer - Simulink (REMOTE)

Anduril Costa Mesa, California

VHDL Verilog

Senior Engineer, PLL Design

Samsung Semiconductor San Jose, California

Verilog SystemVerilog

Physical Design Intern

Ambiq Micro, Inc. Singapore, Central Singapore

VHDL Verilog

Sept. 22, 2026

SoC Program Manager, Director

Qualcomm Chennai, Tamil Nadu

ASIC Synthesis

10d

Turing-Design Verification Sr Lead Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10d

FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)

Qualcomm Toronto, Ontario

Verilog SystemVerilog

10d

Sr. Staff Engineer – Power Lead, Systems Architecture

Qualcomm Bangalore, India

RTL Synthesis

10d

VLSI Design & System Architect/ Engineer

Qualcomm Chennai, Tamil Nadu

VHDL Verilog

10d

CPU Design Verification Engineer (Senior level) - Cambridge, UK

Qualcomm Cambridge, England

ASIC Digital Design

10d

Physical Design Engineer

Qualcomm Markham, Ontario

ASIC RTL

10d

SOC Design Verification Sr Lead Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10d

SOC Design Verification Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10d

Senior Emulation Performance Methodology & Debug Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

10d

Emulation Engineer - Sr/Lead/Staff Engineer

Qualcomm Hyderabad, Telangana

Verilog System Verilog

10d

Post Silicon Validation -Sr/Lead/Staff Engineer

Qualcomm Hyderabad, Telangana

Verilog System Verilog

10d

Senior Director, Project Engineering - Taiwan

Qualcomm Multiple locations

ASIC SOC

10d

“Record Searcher (Records Verification)”

CACI Remote (Any State)

Verification

10d

“Record Searcher (Records Verification)”

CACI Remote (Any State)

Verification

10d

FPGA Digital Engineer - 2

Northrop Grumman Chandler, Arizona

VHDL Verilog

10d

Principal FPGA Digital Engineer - 3

Northrop Grumman Chandler, Arizona

VHDL Verilog

10d

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