UVM Jobs

Senior Engineer I- Design

Microchip Technology Chandler, Arizona

Verilog SystemVerilog

1mo

Senior Engineer - Design

Microchip Technology Burnaby, British Columbia

VHDL Verilog

1mo

Senior Technical Staff Engineer - Verification

Microchip Technology Bangalore, India

Verilog SystemVerilog

1mo

Technical Staff Engineer-Design

Microchip Technology Neu-Ulm, Bavaria

Verilog System Verilog

1mo

Principal Engineer

Microchip Technology Multiple locations

Verilog System Verilog

1mo

Senior Technical Staff Engineer - SOC Verification

Microchip Technology Bangalore, India

SystemVerilog RTL

1mo

Senior IP Design Verification Engineer - XBAR IP

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Senior Verification Engineer - Hardware

NVIDIA Santa Clara, California

VHDL Verilog

1mo

Senior Verification Engineer - ARM Fabric Unit Level

NVIDIA Multiple locations

FPGA UVM

1mo

Senior Verification Engineer - HSIO Cluster and SOC

NVIDIA Multiple locations

FPGA UVM

1mo

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Senior ASIC Design Engineer - DFT

NVIDIA Santa Clara, California

Verilog ASIC

1mo

Senior Design Verification Engineer - Hardware

NVIDIA Shanghai, Shanghai

Verilog UVM

1mo

Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verilog System Verilog

1mo

Senior ASIC Verification Engineer

NVIDIA Austin, Texas

SystemVerilog ASIC

1mo

ASIC Verification Engineer

NVIDIA Austin, Texas

SystemVerilog ASIC

1mo

Senior Verification Engineer

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Senior ASIC Verification Engineer

NVIDIA Austin, Texas

Verilog System Verilog

1mo

Senior Memory Controller Verification Engineer

NVIDIA Santa Clara, California

Verilog System Verilog

1mo