DFT Jobs in California

SoC Power Design Engineer (Engineer - Staff Eng)

Qualcomm San Diego, California

VHDL Verilog

1mo

Senior DFT Engineer

NVIDIA Multiple locations

RTL DFT

1mo

Physical Design Engineer (Silicon Engineering)

SpaceX Palo Alto, California

ASIC RTL

1mo

Physical Design Engineer (Silicon Engineering)

SpaceX Irvine, California

ASIC RTL

1mo

Senior System Integration and Validation Engineer

NVIDIA Santa Clara, California

Logic Design DFT

1mo

ASIC Design Engineer – Clocks IP

NVIDIA Multiple locations

Verilog ASIC

1mo

Physical Design CPU Methodology Engineer

Tenstorrent Santa Clara, California

ASIC RTL

1mo

Hardware System Design Engineer, Senior or Staff

Qualcomm San Diego, California

FPGA ASIC

1mo

ASIC/RTL Design Engineer for High-speed Interfaces

Qualcomm San Diego, California

ASIC RTL

1mo

CPU SRAM Design & Layout Engineer

Qualcomm Santa Clara, California

Verilog Static Timing

1mo

Senior Staff Engineer, Diagnostics and AI

Qualcomm San Diego, California

ASIC DFT

1mo

Senior Principal ASIC Implementation Engineer

BAE Systems Multiple locations

ASIC Static Timing

1mo

SoC Systems & Infrastructure Engineer (Design • Validation • Debug • FPGA • Emulation • Software)

Qualcomm San Diego, California

Verilog SystemVerilog

1mo

Design for Test Intern, BS - Summer 2027

Marvell Multiple locations

UVM DFT

1mo

Lead CPU Firmware Verification and Validation Engineer/ Manager

Qualcomm Santa Clara, California

DFT Design for Test

1mo

Principal Engineer, SOC Design

Samsung Semiconductor San Jose, California

ASIC RTL

1mo

Staff Electrical Hardware Design Engineer

IonQ Multiple locations

FPGA Digital Design

1mo

Staff Electrical Engineer- Testing

IonQ Pleasanton, California

FPGA DFT

1mo

Senior Staff Electrical Engineer

IonQ Multiple locations

FPGA Digital Design

1mo

Silicon Hardware Engineering - Intern, Graduate

Intel Multiple locations

Logic Design DFT

1mo