DFT Jobs in California

Research Engineer, Chip Design RL

Anthropic San Francisco, California

FPGA ASIC

1d

Physical Design Engineer

Qualcomm San Diego, California

ASIC RTL

3d

Microarchitect and RTL Designer - Compute

MatX Multiple locations

Remote SystemVerilog RTL

3d

Test Engineer (ATE)

Broadcom San Jose, California

ASIC DFT

6d

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

6d

Digital Design Engineer

Qualcomm San Diego, California

Verilog System Verilog

7d

PCB Layout Design Engineer

Northrop Grumman Woodland Hills, California

DFT Design for Test

8d

Physical Design Engineer

Qualcomm Santa Clara, California

ASIC RTL

8d

NPI Program Manager (Staff)

Qualcomm Santa Clara, California

ASIC DFT

8d

Sr. Mixed Signal/RF Test Engineer

NXP Semiconductors Irvine, California

DFT Design for Test

8d

Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

Broadcom Multiple locations

Verilog System Verilog

8d

Sr RF/Mixed Signal Test Engineer

NXP Semiconductors Irvine, California

DFT Design for Test

9d

Principal Validation Lead

Marvell Santa Clara, California

ASIC DFT

9d

Sr. Staff Validation Engineer

Marvell Santa Clara, California

ASIC DFT

9d

Staff HSIO Digital & Mixed Signal Design Engineer

Samsung Semiconductor San Jose, California

Digital Design DFT

9d

Senior Circuit Timing Engineer

NVIDIA Santa Clara, California

RTL STA

11d

ASIC Engineer Intern

HPE Juniper Networks Sunnyvale, California

SystemVerilog ASIC

13d

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA Santa Clara, California

SystemVerilog ASIC

13d

Senior Product Engineer, Mixed Signal SOC — TeraWave

Blue Origin Multiple locations

ASIC DFT

14d

Senior Full-Chip RTL Integration Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

15d