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Sept. 29, 2026
RISCV CPU Design Verification Staff Engineer
FY27 Intern - Soft IP ASIC Engineering Internship - Canada (12 or 16 months)
Security Design Engineer - Cork, IRL
SoC Debug Engineer, Staff
Manager, SoC Systems Validation Engineering (SVE)
SoC Debug Engineer, Senior Staff
SoC Platform Architect - RISC-V
Validation Engineer
Patent Counsel, SoC IPA
DDR Design Verification Staff Engineer
Infra Design Verification Sr Engineer
Formal Verification CAD Engineer
Mixed-Signal IP Memory & Die-to-Die (D2D) System Engineer - Cork, Ireland
PD Engineer
NPU AI/Processor Architecture Design-Staff
Junior DevOps Engineer – Jenkins - Cork, Ireland
SoC Physical Design Engineer (Senior to Principal)
RTL Design (DDR)- Sr Lead
SOC Verification Principal Engineer
SOC Design Verification Sr Staff Engineer
Cybersecurity Engineer: Security Operations Center (SOC)
Cybersecurity Engineer: Security Operations Center (SOC)
Staff Physical Design Engineer
Staff Engineer,Post-Silicon Validation
Sept. 28, 2026
Physical Design Engineer
Sr Principal Digital Design Engineer
Customer Quality Engineer (CQE) – ASIC Products
Power Management Systems Design and Verification Engineer
Sept. 27, 2026
NPU AI/Processor Synthesis Engineer- Sr Lead
Sept. 26, 2026