UVM Jobs

ASIC DV Engineer, Principal/Mgr

Qualcomm Hsinchu City, Taiwan

Verilog System Verilog

1mo

Mixed-Signal Design Verification Engineer - Cork, Ireland.

Qualcomm Cork, Munster

Verilog SystemVerilog

1mo

ASICS Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

1mo

Design Verification Engineer — Memory Subsystem

Qualcomm Multiple locations

Verilog SystemVerilog

1mo

Design Verification Engineer — Memory Subsystem

Qualcomm Santa Clara, California

Verilog SystemVerilog

1mo

Staff RTL Verification Engineer - Haifa

Qualcomm Haifa, Haifa District

SystemVerilog FPGA

1mo

Senior Staff Engineer in Microcontroller Sub-System Verification- Cork, Ireland

Qualcomm Cork, Munster

Verilog SystemVerilog

1mo

DDR PHY Senior Lead Design Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1mo

System IP MicroArchitect

Qualcomm Bangalore, India

Verilog UVM

1mo

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Senior Verification Engineer

NXP Semiconductors Austin, Texas

VHDL Verilog

1mo

Senior Engineer II - IP Verification

Microchip Technology Hyderabad, Telangana

FPGA UVM

1mo

FPGA Design Lead

BAE Systems Multiple locations

VHDL Verilog

1mo

SLD Avionics FPGA Engineer III - Lunar Permanence

Blue Origin Denver, Colorado

VHDL Verilog

1mo

Senior Engineer I - ASIC Verification

Microchip Technology Penang, Malaysia

SystemVerilog RTL

1mo

Technical Staff Engineer - Verification

Microchip Technology Multiple locations

Verilog System Verilog

1mo

Sr. Engineer, SoC Design Verification Engineer, System Management Controller

Tenstorrent Multiple locations

SystemVerilog UVM

1mo

Associate Design Verification Engineer

Analog Devices Dallas, Texas

Verilog SystemVerilog

1mo

Staff Digital Design Engineer

Analog Devices Bari, Apulia

Verilog System Verilog

1mo

Principal FPGA Digital Design Engineer - Signing Bonus

BAE Systems Nashua, New Hampshire

VHDL Verilog

1mo