UVM Jobs

Sr. Staff Verification Engineer- LoRa

Semtech Hyderabad, Telangana

SystemVerilog RTL

1mo

Design Verification Eng 2(IP/SoC)

Lattice Semiconductor Multiple locations

Verilog System Verilog

1mo

Principal Digital Verification Engineer (mfd)

NXP Semiconductors Gratkorn

VHDL Verilog

1mo

SoC Design Verification Engineer

Intel Bangalore, India

Verilog System Verilog

1mo

Senior Design Verification Engineer - Neuromorphic Computing

Intel Multiple locations

ASIC RTL

1mo

Design Verification Engineer (RDSS Intern)

NVIDIA Hsinchu, Hsinchu

SystemVerilog RTL

1mo

System IP RTL Design Lead

Tenstorrent Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Senior/Principal verification Engineer

NXP Semiconductors Hyderabad, Telangana

SystemVerilog RTL

1mo

Senior Verification Engineer, SoC

NVIDIA Multiple locations

Verilog System Verilog

1mo

Senior Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verilog System Verilog

1mo

GPU Core Pipeline IP Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Senior Verification Engineer, Switch SoC

NVIDIA Bengaluru, Karnataka

Verilog UVM

1mo

Architect – AI-Powered Performance Verification Automation

NVIDIA Bengaluru, Karnataka

SystemVerilog UVM

1mo

Senior Design Verification Engineer - TeraWave

Blue Origin Central Texas; Greater Seattle Area; Bay Area, CA

SystemVerilog ASIC

1mo

Sr Principal Verification Engineer

Analog Devices Bangalore, India

Verilog SystemVerilog

1mo

GPU Design Verification Engineer

Qualcomm Markham, Ontario

VHDL Verilog

1mo

GPU Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

1mo

Peripherals Design Verification -Sr Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1mo

Verification Hardware Engineer

Qualcomm Austin, Texas

SystemVerilog ASIC

1mo

Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm Markham, Ontario

SystemVerilog ASIC

1mo