DFT Jobs in Santa Clara, CA
Browse open DFT positions in Santa Clara, CA for FPGA, ASIC, and RTL engineers.
All Locations
California
180
Bangalore
98
Texas
74
Santa Clara, CA
73
Austin, TX
61
San Diego, CA
31
Telangana
27
Hyderabad
27
NPI Program Manager (Staff)
Principal Validation Lead
Sr. Staff Validation Engineer
Senior Circuit Timing Engineer
ASIC Clocks Verification Engineer - New College Grad 2026
Senior Full-Chip RTL Integration Engineer
Senior Director, ATE Test Development
Senior ASIC Design Engineer
Senior ASIC Timing Engineer
Senior DFT Methodology Engineer
Senior DFT Methodology Engineer
Senior DFT Engineer - Post Silicon
Senior Technical Program Manager – DFX Software Methodology
Senior ASIC Design Verification Engineer - LPU
Principal Engineer, ATE Test Development Engineer
Physical Design Engineer, Timing
RF/Analog Design/Mixed-Signal Engineering Internship – Summer 2027
Design For Test Intern, MS - Summer 2027
Senior DFT Logic Design Engineer
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