Digital Physical Design Engineer
NXP Semiconductors
Noida
, Uttar Pradesh
, India
RTL
STA
Static Timing
Synthesis
DFT
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Posted Aug. 11, 2026
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Claim and feature this jobExperienced Digital Physical Design Engineer with strong expertise in Synthesis, Place & Route (PnR), Static Timing Analysis (STA), and ECO implementation. Proven ability to drive timing closure, fix setup/hold violations, and optimize designs for performance and area. Hands-on experience with industry-standard EDA tools, constraint development, and debugging across multiple modes and corners. Collaborative team player skilled in working with RTL, DFT, and signoff teams to ensure successful design convergence and tapeout readiness.
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